An IEEE Cluster 2022 Workshop
This project is maintained by arm-hpc-user-group
EAHPC 2022 was held on Tuesday, September 6th, 2022 from 9:15 AM to 12:30 PM local time (UTC+2). Please see the agenda below for presentation slides and preprint links. The link to the official IEEE proceedings for this workshop will be posted once they are made publicly available.
| Time | Presenter | Paper Title | Authors |
|---|---|---|---|
| 9:15 AM | Jeffrey Young | EAHPC Introduction | - |
| 9:20 AM | Miwako Tsuji | Performance analysis of a state vector quantum circuit simulation on A64FX processor [Slides] | Miwako Tsuji, Mitsuhisa Sato |
| 9:50 AM | Valentin Churavy | Productivity meets Performance: Julia on A64FX [Preprint] [Slides] | Mosè Giordano, Milan Klöwer and Valentin Churavy |
| 10:20 AM | Workshop coffee break | ||
| 11:00 AM | Dennis Smolarski | Performance of an Astrophysical Radiation Hydrodynamics Code under Scalable Vector Extension Optimization [Preprint] [Slides] | Dennis Smolarski, Douglas Swesty and Alan Calder |
| 11:30 AM | Dirk Pleiter | Assessing the State of Autovectorization Support based on SVE [Slides] | Bine Brank and Dirk Pleiter |
| 12:00 PM | Alan Calder | On Using Linux Kernel Huge Pages with FLASH, an Astrophysical Simulation Code [Preprint] [Slides] | Alan Calder, Catherine Feldman, Eva Siegmann, John Dey, Anthony Curtis, Smeet Chheda and Robert Harrison |
| 12:30 | Workshop end |
This workshop focuses on the porting and optimization of scientific and high-performance workloads to the Arm architecture. The last few years have seen an explosion of 64-bit Arm based processors targeted towards server and infrastructure workloads – often with a specialization towards a specific domain – such as HPC, cloud and machine learning.
New designs based on the Arm v9 architecture including the Neoverse core design have become the foundation for a number of new processor designs including Amazon’s 64-core Graviton 3, SiPearl’s Rhea chip, and NVIDIA’s Grace supercomputing-focused CPU. At the same time, Data Processing Units (DPUs) and “converged accelerators” with Arm cores and GPUs or other accelerators expanded the potential applications of Arm HPC to the networking and graphics card acceleration spaces. In this workshop we invite papers on the porting and, if available, optimization of high-performance workloads for this new generation of Arm-based processors. We welcome performance optimization studies either through access to real hardware or via simulation/emulation frameworks, for current- and future-generation Arm hardware.
We are also interested in the evaluation of the usage of Arm platforms for workloads from the data-intensive, HPC, edge computing, and AI arenas. Of specific interest is work that targets cross-over/emerging application areas such as machine learning, deep learning, bioinformatics, and analytics.
This workshop is the third iteration of EAHPC and is a proceedings-based workshop that is closely related to the series of workshops organized at ISC, SC and the Arm Research Summit by groups like the Arm HPC User Group (AHUG).
Submissions will be taken through EasyChair at the following link: EAHPC-2022.
Accepted papers will be included in the IEEE Cluster 2022 conference proceedings.
All submissions must be made in IEEE Format.
Submission Deadline: 30th June (AoE)
Author Notification: July 15th (AoE)
Camera Ready: July 31st (AoE)