International Workshop on Arm-based HPC: Practice and Experience (IWAHPCE-2022)

to be held in conjunction with The International Conference on High Performance Computing in Asia-Pacific Region (HPC Asia 2022), Kobe, Japan, Jan 12-14, 2022

The workshop program is uploaded! The workshop will be held from 15:00 to 17:30 JST (7:00-9:30 CET , 1:00-3:30 EST) on 14th (Fri), Jan 2022.

Advance Program

• 15:00-15:05 Welcome (Mitsuhisa Sato)

• 15:05-15:35 JST (7:05-7:35 CET, 1:05-1:35 EST)
  • “Performance tuning of the Helmholtz matrix-vector product kernel in the computational fluid dynamics solver Nek5000/RS for the A64FX processor”
    • Miwako Tsuji, Misun Min, Stefan Kerkemeier, Paul Fischer, Elia Merzari and Mitsuhisa Sato.
• 15:35-16:05 (7:35-8:05 CET, 1:35-2:05 EST)
  • “Communication-Computation Overlapping for Preconditioned Parallel Iterative Solvers with Dynamic Loop Scheduling”
    • Kengo Nakajima, Balazs Gerofi, Masashi Horikoshi and Yutaka Ishikawa.
• 16:05-16:35 (8:05-8:35 CET, 2:05-2:35 EST)
  • “Simple code adaptation to speed-up Smilei on the ARM-based Fujitsu A64FX processor”
    • Mathieu Lobet, Francesco Massimo, Arnaud Beck, Guillaume Bouchard, Frederic Perez, Tommaso Vinci and Mickael Grech.
• 16:35-17:00 (8:35-9:05 CET, 2:35-3:05 EST)
  • “Experiences with Porting the FLASH Code to Ookami, an HPE Apollo 80 A64FX Platform”
    • Catherine Feldman, Benjamin Michalowicz, Eva Siegmann, Tony Curtis, Alan Calder and Robert Harrison.
• 17:00-17:25 (9:00-9:25 CET, 3:00-3:25 EST)
  • “Onboarding Users to A64FX via Open OnDemand”
    • Aaron Jezghani, Kevin Manalo, Will Powell, Jeffrey Valdez and Jeffrey Young.
• 17:25-17:30 Closing

Workshop Overview

The objective of this workshop is to provide the opportunity to share practices and experiences about high-performance Arm computing systems and their performance and applications.

The world’s fastest Japanese supercomputer Fugaku is using Fujitsu A64FX arm-based manycore processors, and the Astra at Sandia National Laboratories is the first large-scale Arm-based supercomputer using Marvell’s ThunderX2. The last few years have seen an explosion of 64-bit Arm based processors targeted towards server and infrastructure workloads – often with a specialization towards a specific domain – such as HPC, cloud and machine learning. Arm’s new Neoverse reference N1 core design has become the foundation for a number of emerging processors such as Amazon’s 64-core Graviton2 and Ampere’s 80-core Altra, with the EPI project incorporating the successor design into SiPearl’s Rhea chip. More recently, NVIDIA’s Grace processor has been announced for future supercomputing deployments, and GPU-integrated Arm clusters are an emerging category of new HPC clusters. Sharing practices and experiences of using these Arm-based processors will contribute to the advance of high performance computing technology for newly designed system using these new emerging Arm-based processors.

In this workshop, we invite papers on the practice and experience on the Arm-based high performance computing systems and on optimization and performance analysis of high-performance workloads for this new generation of Arm-based processors. We welcome performance studies either through access to real hardware or via simulation/emulation frameworks.

This workshop is a proceedings-based workshop that is closely related to the series of workshops organized at ISC, SC and the Arm Research Summit by groups like the Arm HPC User Group (AHUG).

Topics

In particular, this workshop will focus on the following topics of interest:

• HPC Applications on Arm-based systems
• Performance Analysis, Performance Modeling & Measurement of Arm-based systems
• SVE Vectorisation analysis
• Programming Models & Systems Software related to Arm-based systems
• Networking and accelerators such as GPUs for Arm-based systems
• Artificial Intelligence and Machine Learning by using Arm-based systems
• Emerging Technologies of Arm-based systems

Paper Submissions

• Regular paper: up to 18 pages (in ACM submission format)
• Short paper: 7-8 pages (in ACM submission format)

Authors are invited to submit regular papers of at most 18 pages, or short papers of 7-8 pages, in the PDF format described in the “Paper Submission” section of HPCAsia 2022 website. The page count of the new ACM format includes figures and references, formatted according to the ACM Proceedings Style. Submitted papers must contain original work that has not appeared in and is not under consideration for another conference or journal. Note that all authors should submit manuscripts for review in a single column format.

All submissions will be peer-reviewed by the PC members. Papers will be accepted to presentations in a half-day workshop.

Publication

All accepted papers will be published as a part of HPCAsia 2020 proceedings by ACM and will be included in the ACM digital library if presented at the conference.

Important dates

• Paper submission due: October 31, 2021 November 15, 2021 (extended)
• Paper notification: November 14, 2021 November 29, 2021
• Final camera-ready paper submission due: November 21, 2021 December 6, 2021

Submission site

Submissions via EasyChair IWAHPCE-2022.

Organizers and Program Committee

Organizer and Workshop Chair

• Mitsuhisa Sato, RIKEN R-CCS

Organizing Program Committee

• Jeffrey Young (Georgia Tech)
• Christelle Piechurski (GENCI)
• Stephen Poole (Los Alamos National Laboratory)
• Valerio Schiavoni (University of Neuschatel)
• Michèle Weiland (Edinburgh Parallel Computing Centre)